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Having inherited the concept of PALMiCE series, it
realizes comfortable operation by speedup, and ease-of-use
by compactification and provision for connection that
requires no power supply.
Furthermore, it
supports multiple cores and SWD (Serial Wire Debug), SWV
(Serial Wire Viewer), and ETM (Embedded Trace Macrocell), which are provided by ARM CoreSight™ technology. 
SWD support
Supports "SWD"
interface by 2 strings of signal lines. The number of pins
occupied in the CPU has been reduced than with the
traditional JTAG interface by 5 strings of signal lines, and
by compactification of the connector, it can save the space.
SWV support
Supports "SWV", the
debug information interface by 1 string of signal line from
the CPU.
Besides being capable of variable and event information
referencing without break during execution, it will allow
further improvement in debugging efficiency
by capturing
real-time trace information.
ETM support (ETM model only)
Allows to capture program execution trace data in real time
just by connecting a minimum of 2 strings of signal lines.
Internal/External flash memory support
Also supports software break settings and ordinary memory
rewriting feature in addition to downloading.
Even more compact body design
Although performance has been improved, it has been
materialized to even lighter and smaller body than the
former product.
Inherited Vbus support that requires no power supply
Realized connection that requires no power supply with Vbus
support provision based on the concept inherited from
PALMiCE series. 
Various features that had not been possible only with JTAG
now made into reality with SWV
- Profiler feature
Samples execution addresses at certain time interval and
analyzes the frequency of module execution based on the
times of capture. The feature is useful for identifying the
frequently used functions and the functions which occupy
much of the time.
- Printf debugging feature
By embedding the dedicated function in the user program of
the target, it implements the functionality similar to
Printf of C library. Output destination will be Terminal
Window in CSIDE. With this, the history of variable etc. of
your choice can be saved to file.
- Time measurement between access data
Measures the time between the specified data accesses.
- Status bar
In the status bar, the target voltage is always indicated by
sampling. In addition, it indicates the program counter
value of the running CPU. With these, state of the CPU
execution can be roughly grasped.
CPU tracing feature for efficient analysis of the
program behaviour (ETM model only)
Allows to capture program execution trace data in real time
just by connecting a minimum of 2 strings of signal lines, 1
string for ETM clock and 1 string for data signal. Based on the traced
results, it analyzes program execution and measures
by-module execution rate, maximum and minimum times, etc.
Program monitoring feature for improving application
performanceBy monitoring the state of program execution
during the user application execution to calculate CPU usage
rate and execution rate of the program, and on the basis of
the measured results, the system performance can be
improved.
- CPU usage rate execution history display
By referring to CPU usage rate of the user application in
graph, remaining capacity at the time of program execution
can be checked. In the case of multi-core, CPU usage rate of
each core is shown in graph.
- PC watcher display
Presents the execution rate of the user application as a
graph. Measurement of the execution rate can be by function
or OS task/process unit, hence performance can be measured
for the intended purpose. In the case of multi-core, the
execution rate of each core is shown in graph.
Provided with integrated development environment "CSIDE"
Version 5 as standard
Provided with integrated development environment as
standard for seamless implementation of development phases
from creation of the program to debugging.
CPU break feature
Allows before-execution break of the program and access
break upon read/write of data
by break logic
incorporated in CPU.
Internal/External flash memory support
Also supports software break settings and ordinary memory
rewriting feature in addition to downloading. Furthermore,
new device can be supported by adding definition file format
to external flash memory or by adding the CPU to on-chip
flash memory.
Low voltage support and voltage measurement feature
Automatically follows the target voltage between 1.65V -
5.5V in operation. Also, the target (VTref signal) voltage
value can be indicated.
Easy update
By unique internet key issuing system, real-time support
for newly added CPU, update to the latest version, range of
optionally purchased software, etc. has been made feasible.
To assist debugging of the target program using OS, optional
debug library softwares have been prepared for each OS. Use
of the debug library will add features for OS state
indication, program operation check, etc.
µITRON support
By additionally purchasing optional RTOS Debug Library
besides debugger software, task tracing feature and status
display feature for real-time OS will be added.
(Specifications vary by µITRON.)
TOPPERS support
By additionally purchasing optional RTOS Debug Library
besides debugger software, task tracing feature and status
display feature for real-time OS will be added.
Operating environment
| Supported host: |
IBM PC/AT compatibles (DOS/V machines) |
| Host I/F: |
USB 2.0 |
| Supported OS: |
Windows 2000
SP4 onward/XP
SP1 onward/Vista/7 |
Connection illustration
- ETM model
- JTAG model
| Supported CPUs |
Product
summary |
Technical
information |
■ARM Cortex-M3
■Texas Instruments-made Stellaris®
LM3S800 Series
■STMicroelectronics-made STM32 Family
STM32xxx6,STM32xxx8,STM32xxxB,STM32xxxE
■Toshiba Semiconductor Company-made TX03 Series
TMPM330FDFG
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For details of specifications, check them in Product
summary and Technical information.
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