The use of innovative debugging approach which simulates program execution results based on the traced data allows effective development of more and more overwhelming and complicated programs.

What is traceback feature?

Feature that retrieves register and memory values by simulating trace contents and thereby to materialize pseudo execution.

-Allows program execution and step execution with the traced contents.
-Retrieves global variable and local variable
-Allows to execute backward against the time frame by back step execution
-Allows replication of the problem from any desired address as many times as you like

Immediately available upon trace completion -Allows back step execution immediately upon switching to traceback mode -No waiting time as trace is concurrently executed		Allows fresh start from any desired address as many times as you like -Allows step execution by setting PC to desired address -Allows start over by back step even if passed through by step

Comfortable operability -Allows execution, step execution, setting of breakpoints as in the same manner as ordinary debugging even after switching to traceback mode		Supports target-less debugging Allows debugging only with traced data even without the target

Allows to grasp the program operation at a glance based on a few second traced data captured into large-capacity tracing memory.

Supports tracing of over 100 million instructions

Shows transition graph for function and Linux process Easy to target the point since the program operation can be grasped at a glance.		Shows time interval between marks Allows to mark between 2 points and show the execution time interval.

Saves and loads traced data Allows saving of traced data into file for repeated analysis of the once traced data by loading from the file.		Searches tracing memory contents by direct key input Allows to search just by entering function name to address column.

Improve the efficiency by interlocking with traceback feature By interlocking traceback feature with CPU Tracing Window, debugging can be performed efficiently. [Step] (1)Narrow down to rough point based on switching ladder in CPU Tracing Window. (2)Set PC for traceback to the point. (3)Step execute backward/forward from the point (4)Code Window, Register Window, Variable Window, etc. interacts with step execution.

Provides multi-core-debugging-specific features such as synchronized execution, synchronized break, status display for watching the state of execution by core and also allows debugging of multiple cores that interlock in operation.

Supports multi-core debugging by 1 unit of PALMiCE2H

Supports synchronized execution and synchronized break

Core-sensitive software break and hardware break

Shows execution state for each core

Supports AMP(Asymmetric Multi Processor)

Support for SMP(Symmetric Multi Processor) -Under development-

Supported CPUs

Realizes comfortable debugging operation by high-speed downloading at 1MByte/s or at higher rate and by further speed-up in communication.

High-speed downloading at 1MByte/S or higher rate

Also supports high-speed JTAG clock *1

High-performance in all points

By unique internet key issuing system, real-time support for newly added CPU, update to the latest version, range of optionally purchased software, etc. has been made feasible.

Adding new CPU

Updating to the latest version

Instant use of range of optional software

CPU break feature *1

Allows before-execution break of the program and access break of the cache-hit cycle by break logic incorporated in CPU.

Semi-hosting feature

If the target system has not been implemented with input/output devices such as display, keyboard, and disk, semi-hosting feature allows the use of input/output devices on the host instead. For example, when C library functions such as printf() and scanf() are executed, they will be output to Terminal Window of the debugger and keyboard input will be forwarded to the user program. This feature processes communication between the user program and the debugger in real time without causing break to CPU.

NOR-type flash memory support

Supports debugging features such as software breakpoint setting and normal memory rewriting, besides downloading to NOR-type flash memory. Also, new devices can be added easily by using definition file format. (For some on-chip flash memories, support is provided on optional basis.)

Provided with integrated development environment "CSIDE" as standard

Provided with integrated development environment as standard for seamless implementation of development phases from creation of the program to debugging.

Real-time OS support(Optional)

By additionally purchasing optional RTOS Debug Library besides debugger software, task tracing feature and status display feature for real-time OS will be added. (Specifications vary by real-time OS.)

Embedded Linux support(Optional)

Supports multi-process/thread debugging besides seamless debugging of kernel, device driver, to application at any phase. (Specifications vary by distribution .)

Operating environment

Connection illustration

- ETM model(When connecting with JTAG attached)

- ETM model(When connecting with JTAG detatched)

- JTAG model

ARM family

Supported CPUs	Product summary	Technical information
ARM7TDMI,ARM7TDMI-S,ARM720T, ARM920T,ARM946E-S,ARM966E-S, ARM922T,ARM925T,ARM926EJ-S, ARM1136J-S,ARM1136JF-S, ARM1156T2-S,ARM1156T2F-S, ARM1176JZ-S,ARM1176JZF-S		JTAG/ETM Normal ETM Multiplexer ETM Demulti Single ARM11 ETM Demulti Single

For details of specifications, check them in Product summary and Technical information.
*1: Specifications vary by CPU.

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